Logic circuit testable as an inverter pair and operable as a fli

Details Logic circuit testable as an inverter pair and operable as a fli Logic circuit testable as an inverter pair and operable as a fli

1986-07-22

1988-03-01

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307279, 307291, 307469, 324 73R, H03K 3356

Patent

active

047288230

ABSTRACT:
A logic circuit on a substrate is switchable between a test mode and an operational mode. First and second NOR gates are cross-coupled and may be switched between an operational mode and a test mode by the application of a control signal to first and second transfer gates coupled to the inputs of the NOR gates. The first NOR gate includes a p-type region and an n-type region formed in said substrate and traversed with first and second conductive layers insulated from the p and n-type regions. Thus, the first NOR gate includes two p-channel transistors and two n-channel transistors. The second NOR gate is also formed by a p-type region and an n-type region traversed with third and fourth conductive layers. Thus, the second NOR gate also includes two p-channel transistors and two n-channel transistors. The transfer gates are located on the substrate between the first and second NOR gates. Both transfer gates include an n-type region formed in the substrate with a conductive layer disposed over the n-type region. In the operational mode, the cross-coupled NOR gates may perform as a flip-flop. In the test mode, each NOR gate essentially becomes an inverter.

REFERENCES:
patent: 3460098 (1969-08-01), Blauw
patent: 3761695 (1973-09-01), Eichelberger
patent: 3943378 (1976-03-01), Beutler
patent: 4071902 (1978-01-01), Eichelberger et al.
patent: 4441075 (1984-04-01), McMahon
patent: 4477738 (1984-10-01), Kouba
patent: 4513418 (1985-04-01), Bardell, Jr. et al.
Hnatek, User's Guidebook to Digital CMOS Integrated Circuits; McGraw-Hill Book Co.; 1981; pp. 19-34.

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