Time slot structure for improved TPC estimation in WCDMA

Communications: electrical – Systems – Synchronous distributor at transmitter and receiver

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340316, 340539, 455127, G08B 2300

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06166622&

ABSTRACT:
A communication circuit is designed with a processing circuit (11) coupled to receive a plurality of first control signals (402, 408) from a source external to the communication circuit. The processing circuit produces a second control signal (432, 434) and a second power control (422, 436) signal during each of a plurality of predetermined time periods. The second power control signal is determined by a corresponding first control signal from said plurality of first control signals. The second power control signal is produced proximate the second control signal. A serial circuit is coupled to receive the second control signal and the second power control signal during a respective predetermined time period. The serial circuit produces the second control signal proximate the second power control signal.

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