Semiconductor device with multi-layered metalizations

Details Semiconductor device with multi-layered metalizations Semiconductor device with multi-layered metalizations

1977-09-09

1980-05-06

Tupman, W. C.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29591, 29847, 156656, B01J 1700

Patent

active

042009693

ABSTRACT:
There are provided a semiconductor device having alternately layered insulating and conductive layers on the major surface of a semiconductor body and the process for manufacturing the semiconductor device. In the manufacturing process, the conductive layers other than the conductive layer finally formed are each formed to be a laminate including at least two metal layers of which the etching rates are different. The photo-engraving process follows this step. In the lamina, the metal layer closer to the semiconductor body has a lower etching rate than that of the metal layer formed thereover. In the semiconductor device, the conductive layer other than that disposed furthest away from the semiconductor body has its side wall diverged to widen toward the semiconductor body.

REFERENCES:
patent: 3586922 (1971-06-01), Johnson
patent: 3607480 (1971-09-01), Harrap
patent: 3900944 (1975-08-01), Fuller
patent: 3935083 (1976-01-01), Tomozawa
patent: 3991231 (1976-11-01), Trausch

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