Process and device for locking-in a YIG-tuned oscillator

Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural a.f.s. for a single oscillator

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

331 14, 331 16, 331 18, 331 17, 331 25, 331DIG2, 327156, 455260, H03L 7087, H03L 7099, H03L 7113, H03L 716

Patent

active

061183458

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The invention relates to a method of locking in a phase-locked loop (PLL) around a YIG-tuned oscillator whose frequency is guided into the PLL capture range by a frequency-control loop provided with a frequency discriminator, with the frequency-control loop being able to be switched off after the PLL has locked in; The invention additionally relates to an arrangement for executing the method.
YIG-tuned oscillators are used to suppress the phase jitter near a platform, usually by means of a PLL coupled to a quartz oscillator that is frequency stable in the long term. When a change occurs in the frequency, the small capture range of the relatively narrow-bandwidth PLL is problematic with respect to locking into a new operating frequency.
It is known (Floyd M. Gardner, Phaselock Techniques, Wiley & Sons, New York, 1979, pp. 84-87) to support the lock-in of the PLL with an additional frequency-control loop. In the frequency-control loop, a frequency discriminator is used to determine the control deviation. As soon as the frequency of the YIG-tuned oscillator is guided into the PLL capture range by means of the frequency-control loop, the YIG-tuned oscillator is almost exclusively controlled by the frequency-control loop. If desired, the frequency-control loop can then be shut off (Gardner; see above). YIG-tuned oscillators can be subject to aging, and have a hysteresis, which has a negative effect on the precision of the control of the oscillator frequency via the primary-coil current of the YIG-tuned oscillator. This control is necessary when a change occurs in the frequency for returning the oscillator frequency to the capture range of the control loops.
It is an object of the invention to provide a lock-in method for a YIG-tuned oscillator that takes into consideration aging and hysteresis of the YIG-tuned oscillator. It is a further object of the invention to provide an arrangement for executing the method.


SUMMARY OF THE INVENTION

In accordance with the invention, the above objects are accomplished according to a first aspect of the invention by a method of locking in a phase-locked loop (PLL) around a YIG-tuned oscillator whose frequency is guided into the PLL capture range by a frequency-control loop provided with a frequency discriminator, with the frequency-control loop being able to be switched off after the PLL has locked in, and wherein: with a predetermined change in frequency, the frequency of the YIG-tuned oscillator is preset by a microprocessor that changes the coil current (I.sub.SP) of the primary tuning coil of the YIG-tuned oscillator stepwise in an iterative capture routine until the capture range (.increment.FM) of the switched-on frequency-control loop, which is shifted with the coil current (I.sub.SP), includes the new operating frequency (f.sub.SOLL), whereupon the switched-on frequency-control loop pulls the oscillator frequency into the PLL capture range, and the PLL locks into the new operating frequency (f.sub.SOLL); and the microprocessor interrupts the capture routine if the PLL-LOCK detector announces to the microprocessor that the new operating frequency (f.sub.SOLL) has been locked in.
The above objects are achieved according to a second aspect of the invention by an arrangement for carrying out the method according to the invention, wherein: a predeterminable portion of the output signal of the YIG-tuned oscillator is compared to a reference frequency by a coupling-out stage in a frequency discriminator; the output signal (.increment.f) of the frequency discriminator is supplied into the negative-feedback branch of a loop filter as an integrator, whose output current is used directly as a coil current (I.sub.FM) for regulating the magnetic field of the FM coil of the YIG-tuned oscillator; the coil current (I.sub.SP) of the primary tuning coil of the YIG-tuned oscillator is generated by a V/I converter, which is controlled by a microprocessor via a D/A converter; the output signal (.increment.f) of the frequency discriminator is detected by a P

REFERENCES:
patent: 4459560 (1984-07-01), Kurihara
patent: 4728906 (1988-03-01), Turl et al.
patent: 4792768 (1988-12-01), Fried et al.
patent: 4890071 (1989-12-01), Curtis
patent: 5130670 (1992-07-01), Jaffe
"High-Spectral-Purity Frequency Synthesis in a Microwave Signal Generator" by J. Summers et al. Oct. 1989. pp. 37-41, Hewlet-Packard Journal vol. 40, No. 5.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process and device for locking-in a YIG-tuned oscillator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process and device for locking-in a YIG-tuned oscillator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process and device for locking-in a YIG-tuned oscillator will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-99493

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.