Intermodule test across system bus utilizing serial test bus

Details Intermodule test across system bus utilizing serial test bus Intermodule test across system bus utilizing serial test bus

1994-09-23

1995-06-06

Beausoliel, Jr., Robert W.

G06F 1100

Patent

active

054230500

ABSTRACT:
Intermodule testing in a computer system including a plurality of modules interconnected via a system bus is performed by means of a serial test bus which is incorporated into the computer system for testing components, for example integrated circuits, used to construct the modules of the computer system. Intermodule test data is maintained in memory on each of the modules and is accessible through operations of the serial test bus. Intermodule test data is retrieved by the serial test bus and used to set up the modules so that one module drives the system bus with test signals defined by test vectors included within the intermodule test data. The remaining modules are set up to receive the test signals. Tables are developed in accordance with the intermodule test data to define which test signals drive which system bus leads and also which receiving modules receive the test signals. The signals which are received by the modules set up to receive the test signals are sampled and compared to what signals should have been received to detect errors in intermodule communications. The selection of the module used to drive the system bus is rotated until all modules have driven the system bus.

REFERENCES:
patent: 4225957 (1980-09-01), Doty, Jr. et al.
patent: 4236246 (1980-11-01), Skilling
patent: 4597080 (1986-06-01), Thatte et al.
patent: 4621363 (1986-11-01), Blum
patent: 4635261 (1987-01-01), Anderson et al.
patent: 4701921 (1987-10-01), Powell et al.
patent: 4710931 (1987-12-01), Bellay et al.
patent: 4764925 (1988-08-01), Grimes
patent: 4771428 (1988-09-01), Acuff
patent: 4792955 (1988-12-01), Johnson
patent: 4810958 (1989-03-01), Mogi
patent: 4853929 (1989-08-01), Azuma et al.
patent: 4860290 (1989-08-01), Daniels et al.
patent: 4879717 (1989-11-01), Sauerwald et al.
patent: 4918379 (1990-04-01), Jongepier
patent: 5012180 (1991-04-01), Dalrymple
patent: 5029166 (1991-07-01), Jarwala
patent: 5115435 (1992-05-01), Langford, II
patent: 5132635 (1992-07-01), Kennedy
IEEE Standard Test Access Port and Boundary--Scan Architecture, IEEE Std 1149.1-1990, May 21, 1990.
The Wall Street Journal, Sep. 19, 1990 Edition, Advertisement, pp. A16-A17.

Affiliated with

Also associated with

Rating

Intermodule test across system bus utilizing serial test bus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Intermodule test across system bus utilizing serial test bus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Intermodule test across system bus utilizing serial test bus will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-994546