Semiconductor integrated circuit having substrate potential dete

Details Semiconductor integrated circuit having substrate potential dete Semiconductor integrated circuit having substrate potential dete

1990-03-21

1991-10-15

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072961, 307304, H03L 100, H03K 3354

Patent

active

050577042

ABSTRACT:
A semiconductor integrated circuit for controlling the substrate potential is disclosed, in which a substrate potential generating circuit is connected to a substrate and can be operated on at least a certain operation voltage level to generate the substrate potential. A detection circuit outputs a first detection signal upon detecting that the substrate potential has become lower than the operation voltage level by more than a preset amount, and outputs a second signal upon detecting that the substrate potential has reached a preset level which is slightly lower than the operation voltage level. A charging circuit charges the substrate upon receiving the first detection signal and interrupts the operation of charging the substrate upon receiving the second detection signal.

REFERENCES:
patent: 4322679 (1982-03-01), Lee et al.
patent: 4439692 (1984-03-01), Beekmans et al.
patent: 4705966 (1987-11-01), Van Zanten
patent: 4794278 (1988-12-01), Vajdic
patent: 4961007 (1990-10-01), Kumanoya et al.
Nakano et al., "Effect of V.sub.BB Leak Path Circuit in Dynamic RAM Upon V-Bump Characteristic," 1983, National Meeting 555, Institute of Electronics and Communications Engineers of Japan.

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