Serially accessible memory means with high error correctability

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365240, G11C 804

Patent

active

057517428

ABSTRACT:
In a serially working memory unit with a memory matrix, a row selection unit and a column selection unit are configured such that, given faulty rows or columns, only correctable, single errors or errors of few successive bits occur. This memory unit offers advantages particularly for read-only memories since, due to the memory contents that are already determined during manufacture, substitute rows or columns can thereby not be provided.

REFERENCES:
patent: 4703453 (1987-10-01), Shinoda et al.
patent: 4758989 (1988-07-01), Davis et al.
patent: 5450424 (1995-09-01), Okugaki et al.
IBM Technical Disclosure Bulletin -vol. 27, No. 3 Aug. 1984, pp. 1756,1757.

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