Method and apparatus for efficient self testing of on-chip memor

Details Method and apparatus for efficient self testing of on-chip memor Method and apparatus for efficient self testing of on-chip memor

1997-05-08

1998-05-12

Canney, Vincent P.

Excavating

G06F 1100

Patent

active

057517290

ABSTRACT:
An electronic device and method for utilizing two extra microcode instructions to generate a set of test patterns which provide complete bitwise self-testing of the on-chip memory of a microcode sequencer. The self-testing sequence can be triggered by a single external interface event.

REFERENCES:
patent: 4641308 (1987-02-01), Sacarisen et al.
patent: 4862067 (1989-08-01), Brune et al.
patent: 5638382 (1997-06-01), Krick et al.

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