Boots – shoes – and leggings
Patent
1995-10-10
1998-05-12
Malzahn, David H.
Boots, shoes, and leggings
G06F 752
Patent
active
057516227
ABSTRACT:
A signed multiplier circuit which performs selectable multiplication operations on a first word having an upper byte and a lower byte and a second word having an upper byte and a lower byte. A first multiplier means generates a first product representative of the product of the upper bytes of the first and second words and the product of the lower bytes of the first and second words. A second multiplier means generates a second product representative of the product of the upper byte of the first word and the lower byte of the second word plus the product of the lower byte of the first word and the upper byte of the second word. The second multiplier means can be selectively disabled. When the second multiplier means is enabled, the multiplier circuit multiplies the first and second words. When the second multiplier means is disabled, the multiplier circuit multiplies the upper bytes of the first and second words and the lower bytes of the first and second words.
REFERENCES:
patent: 4130877 (1978-12-01), Riekers
patent: 4130878 (1978-12-01), Balph et al.
patent: 4825401 (1989-04-01), Ikumi
Chromatic Research, Inc.
Kwok Edward C.
Malzahn David H.
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