Method of forming interconnection in semiconductor device

Details Method of forming interconnection in semiconductor device Method of forming interconnection in semiconductor device

1994-02-08

1995-06-06

Fourson, George

Fishing, trapping, and vermin destroying

437228, 437245, 216 13, 216518, H01L 21302, H01L 2138

Patent

active

054223105

ABSTRACT:
To form an interconnection on a substrate, an interconnection material layer is deposited on a surface of a substrate having a step with a base layer of Ti-base metal disposed between the interconnection material layer and the substrate, and the interconnection material layer is etched by way of dry etching using a fluorine gas until a surface of the base layer is exposed. After the surface of the base layer is exposed, the substrate is heated to a temperature ranging from 250.degree. C. to 600.degree. C., and the interconnection material layer and the base layer are continuously etched by way of dry etching. The process allows an interconnection pattern to be reliably formed on the stepped substrate surface.

REFERENCES:
patent: 4657628 (1987-04-01), Holloway et al.
patent: 4793896 (1988-12-01), Douglas
patent: 4884123 (1989-11-01), Dixit et al.
patent: 5227337 (1993-07-01), Kadomura
patent: 5254498 (1983-10-01), Sumi

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