Enhanced input/output architecture for toroidally-connected dist

Details Enhanced input/output architecture for toroidally-connected dist Enhanced input/output architecture for toroidally-connected dist

1987-10-08

1990-07-17

Shaw, Gareth D.

Boots, shoes, and leggings

3642283, 3642319, 3642397, G06F 1516

Patent

active

049425170

ABSTRACT:
A toroidally-connected distributed-memory parallel computer having rows of processors, with each processor having an independent memory. The computer includes at least one common I/O channel adapted to be connected to a single row of processors by buffering mechanisms. Each buffering mechanism is associated with one processor of the single row of processors.

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IEEE Article, 1985, entitled "The Mesh with a Global Mesh: A Flexible, High-Speed Organization for Parallel Computation", by D. Carlson.
IEEE Article, 1986, entitled "M.sup.2 -Mesh: An Augmented Mesh Architecture", by Tsair-Chin Lin and D. I. Moldovan.

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