Excavating
Patent
1982-10-14
1985-06-18
Atkinson, Charles E.
Excavating
371 49, 375110, G06F 1110, H04L 702
Patent
active
045244456
ABSTRACT:
A digital signal comprising a plurality of data blocks each comprising a plurality of data words and a parity word is transmitted without a synchronous word or signal indicative of the boundary between two consecutive data blocks. The parity word comprises a plurality of bits each generated from bits of a corresponding row in the original data words in the data block. When receiving the digital signal, the digital signal is first stored in a memory and a plurality of sets of bits in each row is read out to provide parity checking. As a result of parity checking, absence of parity error will be detected in connection with a particular set of bits, and this particular set of bits in each row can be treated as a single row constituting the original data block. The stored digital signal will be read out and output on the basis of information of absence of parity error so that synchronism of data blocks can be established to accurately restore original analog information from the received digital signal having no synchronous word.
REFERENCES:
patent: 4271520 (1981-06-01), Coombes et al.
patent: 4316284 (1982-02-01), Howson
patent: 4410990 (1983-10-01), Wilkinson
patent: 4412329 (1983-10-01), Yarborough
patent: 4425645 (1984-01-01), Weaver et al.
Atkinson Charles E.
Victor Company of Japan , Limited
LandOfFree
Method and circuit arrangement for synchronous detection does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and circuit arrangement for synchronous detection, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit arrangement for synchronous detection will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-983644