Integrated circuit

Details Integrated circuit Integrated circuit

1984-02-14

1985-06-18

James, Andrew J.

357 71, 357 42, 357 13, H01L 2990, H01L 2904, H01L 2702, H01L 2348

Patent

active

045243778

ABSTRACT:
A high-density integrated circuit employing different first and second channel types of insulated gate field effect transistors is disclosed, which comprises at least three stacked wiring layers, the lowest layer being formed of polycrystalline silicon and including silicon gates of the transistors, one of the upper layers being formed of polycrystalline silicon and used for feeding a power supply to some of the transistors and being connected to at least one well region on which the first channel type of transistors are formed, and the other of the upper layers being formed of high-conductivity metal.

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Garnache, R. R., "Complimentary FET Memory Cell", IBM Tech. Disc. Bull., vol. 18, No. 12, May 1976, pp. 3947-3948.
Walker et al, "Four Transistor Static Memory Cells", IEDM Tech. Digest, 1977.

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