Metal treatment – Compositions – Heat treating
Patent
1984-02-27
1985-06-18
Roy, Upendra
Metal treatment
Compositions
Heat treating
29571, 29576B, 29576T, 148187, 357 237, 357 91, H01L 21265, H01L 700
Patent
active
045239630
ABSTRACT:
A method for manufacturing a semiconductor device, comprising the steps of forming a monocrystalline silicon layer on a sapphire substrate, ion-implanting silicon and oxygen in a portion of the silicon layer which is in the vicinity of an interface between the substrate and the silicon layer, performing annealing to improve a crystal structure of the portion of the silicon layer in the vicinity of the interface and forming an insulation layer, selectively forming an element isolation region in the silicon layer to obtain an island silicon layer, forming a gate insulation film on the island silicon layer, forming a gate electrode on the gate insulation film, ion-implanting an impurity in the island silicon layer by using the gate electrode as a mask, and annealing a resultant structure to form source and drain regions in the island silicon layer such that bottoms thereof reach a surface of the insulation layer.
REFERENCES:
patent: 3909307 (1975-08-01), Stein
patent: 4177084 (1979-12-01), Lau et al.
patent: 4178191 (1979-12-01), Flatley
patent: 4385937 (1983-05-01), Ohmura
patent: 4437225 (1984-03-01), Mizutani
Lau et al., Appl. Phys. Letts., 34 (1979) 76.
Maeyama et al., Jap. Jour. Appl. Phys., 21 (1982) 744.
Feldman et al., Phys. Rev. Letts., 41 (1978) 1396.
Ohmura et al., Jour. Appl. Phys., 54 (Nov. 1983) 6779.
Yamamoto et al., "Gettering Effect by Oxygen Implantation in SOS," Appl. Phys. Lett., vol. 34, No. 6, Mar. 15, 1979.
Yoshii, et al., "Improvement of SOS Device Performance by Solid-Phase Expitaxy," Proceedings of the 13th Conference on Solid State Devices, Tokyo, 1981; Japanese Journal of Applied Physics, vol. 21 (1982) Supplement 21-1, pp. 175-179.
Ohno Jun-ichi
Ohta Takao
Roy Upendra
Tokyo Shibaura Denki Kabushiki Kaisha
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