Transmission and latch circuit for logic signal

Details Transmission and latch circuit for logic signal Transmission and latch circuit for logic signal

1990-03-05

1992-12-22

Shaw, Dale M.

Boots, shoes, and leggings

307279, 307291, H03K 329, G06F 752

Patent

active

051738708

ABSTRACT:
A latch circuit comprises two inverters having their input terminals connected to their respective output terminals, i.e. cross-coupled to each other. In data writing, two data signals which are complementary to each other and applied from a circuit block at a preceding stage are respectively applied to the input terminals of these inverters. In data holding, the two complementary data signals applied in data writing are held at the connecting point of the inverters, and two complementary data signals to be applied to a circuit block at a succeeding stage are derived from the output terminals of the inverters. Therefore, when the data signals applied to the respective inverters are inverted in data writing, a change in the potential of the input terminal of one of the inverters accelerates a change in the output potential of the other inverter. Accordingly, the two complementary data signals outputted from the circuit block at the preceding stage are transmitted rapidly to the circuit block at the succeeding stage via the same path, i.e., at the same rate.

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