Structure for isolating semiconductor components on an integrate

Details Structure for isolating semiconductor components on an integrate Structure for isolating semiconductor components on an integrate

1988-10-25

1990-07-17

James, Andrew J.

357 59, 357 42, 357 50, H01L 2978

Patent

active

049424483

ABSTRACT:
A semiconductor apparatus having a region for isolation between devices comprises a semiconductor substrate, a polycrystalline silicon layer portions selectively formed to be spaced apart from each other on the semiconductor substrate, an impurity diffused region formed under the polycrystalline silicon layer, and a silicon oxide film for filling in a space between the respective adjacent portions of the polycrystalline silicon layer. The impurity diffused region constitutes a source or drain region of a field effect device such as a MOS transistor isolated by the silicon oxide film.

REFERENCES:
patent: 4151631 (1979-05-01), Klein
patent: 4737831 (1988-04-01), Iwai
patent: 4803528 (1989-02-01), Pankove
IEDM 82: "Isolation Technology for Scaled MOS VLSI", by W. G. Oldham, 9.1, 1982, pp. 216-219.
IEDM 82: "Deep Trench Isolated CMOS Devices", by R. D. Rung et al., 9.6, 1982, pp. 237-240.

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