Protection and anti-floating network for insulated-gate field-ef

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

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Details

361 91, 361100, 361101, 307200B, 357 23, H02H 904

Patent

active

044082452

ABSTRACT:
A first IGFET functioning as a pull-up or pull-down transistor is formed in parallel with one of a pair of gated diodes. The first IGFET-diode combination is connected to the gate electrode of a second IGFET to which is connected an external (off chip) signal source. In one mode of operation, the first IGFET is turned-on in response to a control signal and operates as a current path to prevent the gate of the second IGFET from floating in the event of an open circuit. In a second mode of operation, the second IGFET is turned-off in response to a control signal. The diode portion of the combination operates to protect the gate electrode of the second IGFET from any over voltage.

REFERENCES:
patent: 3675144 (1972-07-01), Zuk
patent: 4001606 (1977-01-01), Dingwall
patent: 4037114 (1977-07-01), Stewart et al.
patent: 4037140 (1977-07-01), Eaton, Jr.

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