Schottky device and method of manufacture using palladium and pl

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357 64, 357 67, 357 71, H01L 2948

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044082169

ABSTRACT:
A schottky diode and process of manufacture therefor is disclosed wherein a schottky junction is formed between a high work function metal, typically molybdenum, and a single crystal intermetallic alloy of either palladium or platinum with silicon. The intermetallic alloy is formed by sintering palladium or platinum with silicon at the surface of an epitaxial silicon layer, and then removing, by etching, all of the silicide which is formed. The intermetallic layer remains after the etching process. When using platinum as the metal to form to silicide, the platinum is sheathed with molybdenum before sintering. A titanium layer is placed between the surface of the high work function metal and the outer conductive layers used to permit soldering of the finished wafer or chip in place to avoid degradation of the junction during solder-down.

REFERENCES:
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patent: 3747203 (1973-07-01), Shannon
patent: 3803462 (1974-04-01), Fujita
patent: 3906540 (1975-09-01), Hollins
patent: 3928865 (1975-12-01), Yamashita
patent: 4007476 (1977-02-01), Hutson
patent: 4203780 (1980-05-01), Matsushita et al.
H. Carchano et al., "Electr. Prop. of Silicon Doped with Plat.", S.-S. Electr., vol. 13, Jan. 1970, pp. 83-90.
J. Andrews et al., "Formation of NiSi and the Current Transport Across the NiSi-Si Interface", S.-S. Electr., vol. 14, Aug. 1971, pp. 901-908.
M. Bleicher et al., "Schottky-Carrier Cap. Meas. for Deep-Level Impurity Det.", S.-S. Electr., vol. 16, 1973, pp. 375-380.
J. Gniewek et al., "Three Barrier Ht. SBO Process", IBM Tech. Discl. Bull., vol. 20#3, Aug. 1977, pp. 1001-1002.

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