Power management masked clock circuitry, systems and methods

Details Power management masked clock circuitry, systems and methods Power management masked clock circuitry, systems and methods

1996-12-04

1998-03-17

Butler, Dennis M.

395556, G06F 104

Patent

active

057297207

ABSTRACT:
An electronic system (100) includes a register (TONTOFF) for data and a clock circuit (2340, 708) coupled to the register and responsive to the data in the register to generate a series of clock pulses (CPU.sub.-- CLK). The series of clock pulses occupies time intervals (2550) interspersed with time intervals free of clock pulses (2552), as an output having a ratio of the time intervals responsive to the data. Other devices, systems and methods are also disclosed.

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