Boots – shoes – and leggings
Patent
1988-03-11
1990-08-07
Clark, David L.
Boots, shoes, and leggings
34082551, G06F 124
Patent
active
049474782
ABSTRACT:
An interprocessor link system has a plurality of processor units having a common input/output device. The system further has at least one flip-flop for setting a processor mode so as to switch between the plurality of processors, and gates for releasing the reset state of one of the processor units in accordance with a value of an output from the flip-flop. One processor unit is set by using the flip-flop. The active processor unit occupies a bus (address/data/status control) commonly used with other processor units. A change in state of the flip-flop is detected by an additional shift register and an exclusive OR gate, and an initialize signal is generated for a predetermined period of time to initialize hardware.
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Floyd, "Digital Fundamentals", 1982, pp. 269-273.
Clark David L.
Kabushiki Kaisha Toshiba
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