Stress free chip mount and method of manufacture

Details Stress free chip mount and method of manufacture Stress free chip mount and method of manufacture

1991-09-27

1992-12-08

Echols, P. W.

Electricity: electrical systems and devices

Miscellaneous

29832, 361388, 361419, H05K 330, H05K 720

Patent

active

051703297

ABSTRACT:
A chip mount is provided for mounting a chip on a circuit board to reduce stresses caused by thermal expansion mismatch between the chip and the circuit board. The chip mount includes a strip member secured to the chip and a guide layer secured to the circuit board. The guide layer includes slots formed therein for slidably receiving and holding the strip member such that upon expansion or contraction of the chip relative to the circuit board, the strip member slides in the slot to reduced stresses resulting from the expansion or contraction of the chip. The guide layer and the strip member are formed of materials that are generally non-reactive to inhibit bonding of the guide layer to the strip member.

REFERENCES:
patent: 4529836 (1985-07-01), Powers et al.
patent: 5112648 (1992-05-01), Okonogi et al.
Carlson, R. O. et al, "Thermal Expansion Mismatch in Electronic Packaging" Material Research Society Symposium Proceeding, vol. 40 (1985).

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