Electronic component capable, in particular, of performing a div

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G06F 752

Patent

active

057294879

ABSTRACT:
The component essentially includes three subtracter operators (ST1-ST3) connected between two multiplexers (MUX1, MUX2), associated with a shifter (DEC) for shifting the dividend and a concatenator means (MCT) for delivering the successive partial dividends from the contents of an output flip-flop (B3) and from the successive shifted words (S). The final-result word is stored in a shift register (RG). The component may be applied to image processing.

REFERENCES:
patent: 5007009 (1991-04-01), Azetsu
patent: 5105378 (1992-04-01), Mori
patent: 5128891 (1992-07-01), Lynch et al.
patent: 5420809 (1995-05-01), Read et al.
International Journal of Electronics, vol. 64, No. 6, Jun. 1988, pp. 885-896.

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