1987-11-23
1990-08-07
Larkins, William D.
357 68, 357 71, H01L 23535, H01L 27118
Patent
active
049472291
ABSTRACT:
A semiconductor integrated circuit (IC) comprises a functional block which includes a plurality or first and second power source wiring layers arranged parallel to one another and formed so as to extend in a predetermined direction. A plurality of element regions are located between adjacent pairs of the first and second power source wiring layers. A cell block on the (IC) includes a plurality of cell column areas each having third and fourth power source wiring layers which are arranged parallel to each other and formed so as to extend in the predetermined direction. An element region is located between the third and fourth power source wiring layers. A plurality of wiring regions are located between adjacent cell column areas. A wiring interconnection section is also included for connecting the first and second power source wiring layers to the function block and includes a fifth power source wiring layer of double-layered structure having upper and lower layers respectively connected to the first and second power source wiring layers. The wiring interconnection section includes first and second segments which are also formed to extend in the predetermined direction, so as to connect the lower and upper layers of the fifth power source wiring layer to the third and fourth power source wiring layers.
REFERENCES:
patent: 4661815 (1987-04-01), Takayama et al.
patent: 4780846 (1988-10-01), Tanabe et al.
patent: 4833520 (1989-05-01), Ito et al.
patent: 4870300 (1989-09-01), Nakaya et al.
Morimoto Toshiki
Tanaka Yutaka
Watanabe Seiji
Kabushiki Kaisha Toshiba
Larkins William D.
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