Integrated circuit power supply contact

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357 231, 357 48, 357 86, H01L 2702

Patent

active

049472283

ABSTRACT:
An integrated circuit formed on a substrate has field effect transistors formed in relatively lightly doped (i.e., high resistivity) epitaxial layer, typically in a "tub" formed therein. Operating current for the transistors is provided at least in part through a metallic layer on the back side of the substrate. Surprisingly, the conductivity is sufficiently high through the epitaxial layer and the substrate that the number of power supply bondpads on the front side may be reduced, or eliminated entirely in some cases. In addition, a reduction in power supply lead inductance is obtained, reducing ringing and ground bounce problems.

REFERENCES:
patent: 4572972 (1986-02-01), Shoji
patent: 4631570 (1986-12-01), Birritella et al.
patent: 4641172 (1987-02-01), Iwatani
patent: 4672584 (1987-06-01), Tsuji et al.
patent: 4675717 (1987-06-01), Herrero et al.
patent: 4684973 (1987-08-01), Takano et al.
Electronics, "Pinout Fuss Yields Quieter Fast CMOS", Nov. 12, 1987, by J. Robert Lineback, pp. 32-33.

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