Image processing apparatus

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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Details

358451, 358460, 358409, H04N 140, H04N 1393, H04N 136

Patent

active

052571203

ABSTRACT:
An image processing apparatus reading images by relatively moving linear CCDs in a subscanning direction on the original images includes a clock generation circuit for generating first and second clock signals having different pulse numbers per unit time, and first and second image memories alternately writing line by line the read image data, one of which carries out writing operation while the other carries out reading operation of the written image data. Writing address of the first and second image memory is designated by a first clock signal, and a reading address of the first and second image memory is designated by a second clock signal. When the image data is stored with low frequency clock signal and the image data are read in accordance with a high frequency clock signal, a reduced image can be formed.

REFERENCES:
patent: 3967243 (1976-06-01), Kawa
patent: 4422102 (1983-12-01), Tamura
patent: 4679096 (1987-07-01), Nagashima
patent: 4760466 (1988-07-01), Nakamura
patent: 4807044 (1989-02-01), Kikuchi et al.
patent: 4893194 (1990-01-01), Sakata

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