Variable Frequency Divider

Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural a.f.s. for a single oscillator

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331 1A, 331 16, 331 25, 327115, 327117, 377 48, H03L 7087, H03L 718, H03K 2100

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active

057291799

ABSTRACT:
In a variable frequency divider capable of N+1/2 frequency division, a programmable frequency divider alternately frequency-divides an input signal by a frequency division ratio N (N being an integer) or by a frequency division ratio N+1. A first signal generating circuit generates a first signal in synchronism with an output signal of the programmable frequency division circuit. A second signal generating circuit generates a second signal which is identical to the first signal but delayed by half a period of the input signal. An output circuit alternately selects the first and second signals, and outputs the selected signal as frequency-divided signal. A delay circuit outputs a delayed signal identical to the first signal but delayed by one period of the input signal. A preset signal generating circuit alternately selects the delayed signal and the first signal, and presets the programmable frequency division circuit with the selected signal. The programmable frequency divider used may operate at the same speed as in N frequency division.

REFERENCES:
patent: 3967205 (1976-06-01), Rossi
patent: 4573176 (1986-02-01), Yeager
patent: 4888564 (1989-12-01), Ishigaki
patent: 4935944 (1990-06-01), Everett
patent: 5063579 (1991-11-01), Sasaki
patent: 5144254 (1992-09-01), Wilke
patent: 5528181 (1996-06-01), Suggs
Philips Semiconductor Application Note, SCO/AN92002J, Frequecny Synthesizer, UMA 1005 Designer's Guide, Ken Maison (translated Nov. 5, 1992, pp. 1, 2, 7 and 8).

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