Patent
1996-03-28
1999-06-01
Ellis, Richard L.
395588, G06F 938
Patent
active
059095733
ABSTRACT:
To increase the efficiency of a pipelined microprocessor, branch prediction is often implemented. Many branch instructions are used to implement program loops with a fixed number of iterations. To accurately predict the branching behavior of branch instructions used to implement program loops a counter based branch prediction system is suggested. The counter based branch prediction system is based on acquiring a final loop count at run time. The final loop count specifies the number of iterations the loop will perform such that the final loop count is used to predict the branching behavior of the branch instruction used to implement the program loops. Three methods for acquiring a final loop count are proposed. Using the suggested counter-based branch prediction method improves the branch prediction rate of the loop related branch instructions and the overall average prediction rate. As a result, this enables the design of higher performing computer pipelines.
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Ellis Richard L.
Intel Corporation
Winder Patrice L.
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