Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Patent
1993-06-14
2000-12-05
Picardat, Kevin M.
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
438 31, 438 39, H01L 2100
Patent
active
061565822
ABSTRACT:
A method of fabricating a ridge VCSEL having a first stack of mirrors, a second stack of mirrors and an active area sandwiched therebetween, including the steps of depositing a metal layer, an etchable layer and a masking layer on the second stack, removing portions of the masking layer, the etchable layer and the metal layer to form a mask, using the mask to etch the second stack to form a mesa, removing portions of the etchable layer to expose the metal layer, depositing an additional metal layer on the side of the mesa and the exposed portion of the metal layer to define a light emitting area, removing the etchable and masking layers to expose the metal layer in the light emitting area, and removing the exposed portion of the metal layer to expose the light emitting area.
REFERENCES:
patent: 4990466 (1991-02-01), Shich et al.
patent: 5034344 (1991-07-01), Jewell et al.
patent: 5104824 (1992-04-01), Clausen, Jr. et al.
patent: 5115442 (1992-05-01), Lee et al.
patent: 5158908 (1992-10-01), Blonder et al.
Lebby Michael S.
Shieh Chan-Long
Motorola Inc.
Parsons Eugene A.
Picardat Kevin M.
LandOfFree
Method of fabricating top emitting ridge VCSEL with self-aligned does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating top emitting ridge VCSEL with self-aligned, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating top emitting ridge VCSEL with self-aligned will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-960775