Method for making solid-state device utilizing isolation grooves

Details Method for making solid-state device utilizing isolation grooves Method for making solid-state device utilizing isolation grooves

1973-08-06

1990-08-07

Saba, William G.

Fishing, trapping, and vermin destroying

148DIG85, 148DIG117, 148DIG161, 156640, 156641, 156648, 156649, 357 48, 357 49, 357 50, 357 55, 437 6, 437 67, 437947, 437981, H01L 2120, H01L 21302, H01L 2176

Patent

active

049468006

ABSTRACT:
The method for making an improved, surface-passivated and electrically isolated silicon device (including integrated circuit) comprises providing in a silicon wafer with a pn junction or other electronic rectifying barrier; and thermally oxidizing or ion-implanting oxygen or nitrogen into selected silicon surface regions to form electrically isolating grooves. The grooves have symmetrical, centrally rounded bottoms which are located within a few microns below the pn junction or rectifying barrier. Through these unique oxide
itride forming conditions and curvature, symmetry, and proximity effects, novel passivation and isolation results obtain.

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