Decimation filter

Details Decimation filter Decimation filter

1997-11-10

1999-06-01

Kizou, Hassan

Boots, shoes, and leggings

36472416, G06F 1710

Patent

active

059093838

ABSTRACT:
A decimation filter is disclosed. A first adder receives a digital video x(n) signal as its two input signals, adds the two input signals, and outputs a signal 2x(n). A delay delays digital video signal x(n) by one period, and sends the delayed signal to a second adder. The second adder adds digital video signal x(n-1), delayed by the delay by one period, to digital video signal x(n), and outputs the added signal to a third adder. The third adder adds output signal 2x(n) of the first adder to output signal x(n)+x(n-1) of the second adder, and sends resultant signal 3x(n)+x(n-1) to a bit shifter. The bit shifter shifts signal 3x(n)+x(n-1) output from the third adder by two bits to the right, and divides the shifted signal by 2.sup.2, producing a signal y(n)={3 x(n)+x(n-1)}/4.

REFERENCES:
patent: 5170368 (1992-12-01), Hattori
patent: 5301134 (1994-04-01), Maruyama
patent: 5479454 (1995-12-01), Greggain et al.
patent: 5500811 (1996-03-01), Corry
patent: 5831880 (1998-11-01), Lee
patent: 5838600 (1998-11-01), McNeely et al.

Affiliated with

Also associated with

Rating

Decimation filter does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Decimation filter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Decimation filter will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-959373