System and method for verifying logic circuit based on signal li

Details System and method for verifying logic circuit based on signal li System and method for verifying logic circuit based on signal li

1996-08-07

1999-06-01

Teska, Kevin J.

Boots, shoes, and leggings

364489, 364490, G06F 1700

Patent

active

059093749

ABSTRACT:
A logic circuit verifying system selects independent signal lines which are positioned in an input terminal side and affects both of two internal signal lines extracted from two combinational logic circuits. The logical functions of the two internal signal lines are generated using the selected signal lines as a pseudo-input. If the logical functions match, it is determined that the two internal signal lines are equivalent to each other. According to the information about the equivalent signal lines, the equivalence of the two logic circuits can be efficiently verified.

REFERENCES:
patent: 5243538 (1993-09-01), Okuzawa et al.
W. Kunz, et al., "Recursive Learning: A new Implication Technique for Efficient Solutions to CAD Problems--Test, Verification, and Optimization"; (1994); pp. 1143-1158.
S.M. Reddy, et al., "Novel Verification Framework Combining Structural and OBDD Methods in a Synthesis Environment"; (1995); pp. 414-419.
J. Jain, et al., "Advanced Verification techniques Based on Learning"; (1995); pp. 420-426.
C. Leonard Berman, et al., "Functional Comparison of Logic Designs for VLSI Circuits"; (1989); pp. 456-459.
Cerny et al "Tautology Checking Using Cross-Controllability and Cross-Observability Relations," IEEE, pp. 34-37, Nov. 1990.
Mukherjee et al "Veriful: Verification Using Functional Learning," IEEE, pp. 444-448, Mar. 1995.
Jain et al "IBDDs: An Efficient Functional Representation for Digital Circuits," IEEE, pp. 440-446, Mar. 1992.
Nakaoka et al "A Verification Algorithm for Logic Circuits with Internal Variables," IEEE, pp. 1920-1923, 1995.
Mukherjee et al "On More Efficient Combinational ATPG Uisng Functional Learning," IEEE, pp. 107-110, 1995.
Mukherjee et al "Functional Learning: A New Approach to Learning in Digital Circuits," IEEE, pp. 122-127, Apr. 1994.

Affiliated with

Also associated with

Rating

System and method for verifying logic circuit based on signal li does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for verifying logic circuit based on signal li, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for verifying logic circuit based on signal li will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-959308