Counter circuit with or gates interconnecting stages to provide

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Identifying or correcting improper counter operation

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Details

377 55, 377116, H03K 2140

Patent

active

053393430

ABSTRACT:
A counter circuit includes a plurality of one-bit counters connected in series. The counter circuit includes first and second input terminals which are supplied with a predetermined signal, respectively, in an operational test mode. The counter circuit further includes a unit for alternately supplying a carry signal to a carry signal input of each one-bit counter in series when the predetermined signals are applied thereto. The unit may be composed of a plurality of OR circuits. Each OR circuit is provided with one input connected to the carry signal output of a one-bit counter at the preceding stage of the series, the other input connected to either the first input terminal or the second input terminal, and an output connected to the one-bit counter at the next stage.

REFERENCES:
patent: 3588475 (1971-06-01), Scott
patent: 3798354 (1974-03-01), Sadlak
patent: 4733405 (1988-03-01), Shimizume et al.
patent: 4979193 (1990-12-01), Mehta
patent: 4991186 (1991-02-01), Payen et al.
patent: 5185769 (1993-02-01), Wang

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