Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1999-04-02
2000-09-12
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
710720, 257389, H01L 21302, H01L 213065
Patent
active
06117789&
ABSTRACT:
A method of manufacturing a thin film resistor layer. A first insulating layer is formed on a substrate, wherein the substrate has at least a device previously formed therein. A thin film resistor layer is formed on the first insulating layer. A second insulating layer is formed on the thin film resistor layer. The second insulating layer and the thin film resistor layer are patterned. A third insulating layer is formed on the first insulating layer and the patterned second insulating layer. An anisotropic etching step is performed to form a first opening penetrating through the third and the first insulating layers and to form a second and a third openings penetrating through the third insulating layer, simultaneously. A self-aligned etching step is performed to expose a portion of the thin film resistor layer through the second and the third openings. The second and the third openings are filled with a conductive material to form interconnects on the third insulating layer.
REFERENCES:
patent: 5420063 (1995-05-01), Maghsoudnai et al.
patent: 5605859 (1997-02-01), Lee
patent: 5656524 (1997-08-01), Eklund et al.
Umez-Eronini Lynette T.
United Microelectronics Corp.
Utech Benjamin L.
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