Method of bonding a III-V group compound semiconductor layer on

Details Method of bonding a III-V group compound semiconductor layer on Method of bonding a III-V group compound semiconductor layer on

1995-03-16

1998-03-17

Dang, Trung

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

438403, 438406, H01L 2130

Patent

active

057286230

ABSTRACT:
Prior to a heat treatment for bonding a III-V group compound semiconductor layer on a silicon substrate, a thermal stress relaxation layer is provided between the silicon layer and the III-V group compound semiconductor layer thermal stress relaxation layer, having a thermal expansion coefficient equal or near to the thermal expansion coefficient of the III-V group compound semiconductor layer and having a rigidity coefficient being sufficiently large to suppress generation of any crystal defects in the III-V group compound semiconductor layer due to a thermal stress generated in the heat treatment and subsequent cooling stage by the difference in the thermal expansion coefficient between the III-V group compound semiconductor layer and the silicon layer.

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