Method for forming integrated circuit regions defined by recesse

Details Method for forming integrated circuit regions defined by recesse Method for forming integrated circuit regions defined by recesse

1975-04-16

1977-08-30

Van Horn, Charles E.

Metal working

Method of mechanical manufacture

Assembling or joining

29580, 29590, 148 15, 148186, 156649, 156657, B01J 1700

Patent

active

040444546

ABSTRACT:
In the fabrication of integrated circuits, a method is provided for forming dielectrically isolated regions in a silicon substrate comprising initially introducing conductivity-determining impurities into the substrate to form at least one region of one-type conductivity at the surface of said substrate. Then, a mask comprising a composite of a bottom layer of silicon dioxide and a top layer of silicon nitride is formed over at least a portion of the surface of said introduced regions. The substrate is then subsequently thermally oxidized to an extent sufficient to form regions of recessed silicon dioxide abutting and thus laterally defining said region of one-type conductivity. In this manner, it is ensured that the recessed silicon dioxide will abut introduced region irrespective of the extent of the "bird's beak" normally associated with thermal oxidation utilizing silicon dioxide-silicon nitride masking.

REFERENCES:
patent: 3755001 (1973-08-01), Kooi et al.
patent: 3783047 (1974-01-01), Paffen et al.
patent: 3808058 (1974-04-01), Henning
patent: 3853633 (1974-12-01), Armstrong
patent: 3899363 (1975-08-01), Dennand
patent: 3900350 (1975-08-01), Appels et al.
patent: 3904450 (1975-09-01), Evans et al.
patent: 3933540 (1976-01-01), Kondo et al.
patent: 3961999 (1976-06-01), Atitipou et al.
patent: 3962779 (1976-06-01), Edwards et al.

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