Fishing – trapping – and vermin destroying
Patent
1993-11-03
1994-08-16
Quach, T. N.
Fishing, trapping, and vermin destroying
437 47, 437 56, 437193, 437200, 437919, H01L 21334, H01L 21283
Patent
active
053387015
ABSTRACT:
A method of forming a polycide-to-polysilicon capacitor simultaneously with a CMOS device with polycide gate is described. Field oxide regions, n-well and p-well regions, and gate oxide regions are formed in and on a silicon substrate. A first layer of polysilicon, having a suitable doping concentration, is formed on the surface of the substrate and the field oxide regions. A layer of silicide is formed over the layer of polysilicon. The layer of silicide is ion implanted in a vertical direction to produce the low voltage coefficient and high linearity. A layer of interpoly oxide is formed over the layer of silicide. The layer of interpoly oxide is densified. A second layer of polysilicon is formed on the surface of the interpoly oxide. The second layer of polysilicon is doped, and then patterned to form the top plate of the capacitor. The layer of interpoly oxide is removed, except in the area under the top plate of the capacitor, where it acts as a capacitor dielectric. The layer of silicide and the layer of polysilicon are patterned to form a polycide bottom plate of the capacitor and to form the polycide gate. The layer of silicide is annealed. The source and drain regions of the CMOS device are formed in the substrate in the regions between the polycide gate and the field oxide regions; and the remaining layers are formed to complete the integrated circuit.
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patent: 5037772 (1991-08-01), McDonald
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Hsu Shun-Liang
Lin Mou-Shiung
Shi Chun-Yi
Ackerman Stephen B.
Quach T. N.
Saile George O.
Taiwan Semiconductor Manufacturing Company
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