Reconfiguring control system in a parallel processing system by

Details Reconfiguring control system in a parallel processing system by Reconfiguring control system in a parallel processing system by

1995-03-14

1998-09-15

Elmore, Reba I.

Boots, shoes, and leggings

364184, 39518202, 39518306, G05B 1918

Patent

active

058088865

ABSTRACT:
A sender processor unit 101 transmits a packet to which a logical address of a receiver processor unit is added. Network routers 102 to 108 obtains a physical address corresponding to a destination logical address by referring to a processor address translation table 122 through a signal line 140, sets a route 112 and transfers the packet to a receiver processor unit 107. When a fault is caused in the receiver processor unit 107, a service processor changes correspondence of logical addresses to physical addresses of the processor address translation table 122. Consequently, a route 113 to a substitute processor unit 105 is dynamically

REFERENCES:
patent: 4453213 (1984-06-01), Romagosa
patent: 4484326 (1984-11-01), Turner
patent: 4564900 (1986-01-01), Smitt
patent: 5157654 (1992-10-01), Cisneros
patent: 5166926 (1992-11-01), Cisneros et al.

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