Method and system for tracking the state of each one of multiple

Details Method and system for tracking the state of each one of multiple Method and system for tracking the state of each one of multiple

1995-02-17

1997-01-28

Beausoliel, Jr., Robert W.

Excavating

G01R 3128

Patent

active

055984215

ABSTRACT:
The logic circuitry of an IC chip is connected to JTAG register chains which hold state information on each portion of the logic circuitry therein. A JTAG Tracker Module is connected to the controls of each of the JTAG register chains enabling a programmer-operator to read the present state of each JTAG register chain and enabling a readout of the logic circuits condition in a single clock period.

REFERENCES:
patent: 4604746 (1986-08-01), Blum
patent: 4621363 (1986-11-01), Blum
patent: 4688222 (1987-08-01), Blum
patent: 5260947 (1993-11-01), Posse
patent: 5285453 (1994-02-01), Gruodis
patent: 5333139 (1994-07-01), Sturges
patent: 5465259 (1995-11-01), Hanafusa et al.
patent: 5517637 (1996-05-01), Bruce, Jr. et al.

Affiliated with

Also associated with

Rating

Method and system for tracking the state of each one of multiple does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for tracking the state of each one of multiple, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for tracking the state of each one of multiple will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-945937