Servo loop processor

Communications: radio wave antennas – Antennas – Balanced doublet - centerfed

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Details

343 7A, G01S 302

Patent

active

043161936

ABSTRACT:
A servo loop processor suitable for use in a passive radar range determining system is disclosed. Early and late overlapping video pulse trains derived from spaced receiving antennas are fed to separate first and second channels and are sampled and held from pulse period to pulse period to form signals representing the amplitude envelopes of the received pulse trains. The output of the first channel is variably delayed and the delayed signal is compared with the undelayed output of the second channel to create an error signal. The output of the second channel is also differentiated, and the result is sampled and held to create a reference signal that has the proper phase relationship with the error signal so that the error signal can be multiplied by the reference signal to create a correction signal. The resulting correction signal is integrated and fed back to control the time delay applied to the output of the first channel such that a closed servo loop is formed. At balance, the integrated correction signal is related to the distance between the radar antenna transmitting the pulse trains, and the receiving antennas. In an alternative embodiment, envelope signals representing the first and second channel pulse trains are converted from analog to digital form, and the digitized second channel output is subtracted from the same digitized signal delayed by a fixed interval to form a digital version of the above-mentioned reference signal. A digital version of the error signal, derived as above, is then multiplied by the digital reference signal to create a digital correction signal, which after integration, controls the time delay of the first channel output signal.

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