Patent
1990-07-11
1991-05-07
Prenty, Mark
357 236, 357 45, 357 68, H01L 2702, H01L 2968, H01L 2710, H01L 2348
Patent
active
050141031
ABSTRACT:
A dynamic random access memory includes a semiconductor substrate having an active region including first and second diffusion regions of a transfer transistor, an insulating layer formed on the semiconductor substrate and having first and second contact holes, and a stacked capacitor having a storage electrode which is electrically coupled to the first diffusion region through the first contact hole formed in the insulating layer and an opposed electrode. The DRAM also includes a word line electrically isolated from the semiconductor substrate, and a bit line electrically isolated from the semiconductor substrate and electrically coupled to the second diffusion region through the second contact hole formed in the insulating layer. The second contact hole is substantially positioned at a center of the bit line. The word line has a bent portion located between the first and second contact holes so that the word line is separated from the second contact hole at a predetermined distance.
REFERENCES:
"3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMS", T. EMA et al, 592-IEDM 88, pp. 592-595, 596-599, Dec. 1988.
Fujitsu Limited
Prenty Mark
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