Multi stage slew control for an IC output circuit

Details Multi stage slew control for an IC output circuit Multi stage slew control for an IC output circuit

1989-11-03

1991-05-07

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307263, 307443, H03K 1716, H03K 17687

Patent

active

050139401

ABSTRACT:
The transient voltage spike generated by the distributed inductance of the packaging wires on an IC chip is reduced by slowing the on-to-off switching speed of the output transistors. The longer switching time provides a longer dt in the di/dt current through the wires during turn off. A two stage slew control circuit controls the initial stage and final stage of the slew period with an initial fast stage to advance the start of output transistor turn off and a slow stage for extending the turn off slew period during the final stage of the slew period.

REFERENCES:
patent: 4329600 (1982-05-01), Stewart
patent: 4723108 (1988-02-01), Murphy
patent: 4771195 (1988-09-01), Stein
patent: 4800298 (1989-01-01), Yu et al.
patent: 4859870 (1989-10-01), Wong et al.
patent: 4877978 (1989-10-01), Platt

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