Process for fabricating a cup-shaped DRAM capacitor using a mult

Details Process for fabricating a cup-shaped DRAM capacitor using a mult Process for fabricating a cup-shaped DRAM capacitor using a mult

1995-06-21

1997-01-28

Tsai, H. Jey

Fishing, trapping, and vermin destroying

437 60, 437919, H01L 2170, H01L 2700

Patent

active

055977561

ABSTRACT:
This invention is a process for fabricating a dynamic random access memory (DRAM) having a stacked capacitor with hemispherical-grain (HSG) polysilicon asperities on an amorphous silicon storage-node plate. The process enables the selective formation of HSG polysilicon asperities on the storage-node plates and a subsequent deposition of a high-quality silicon nitride cell dielectric layer on the asperity-covered storage-node plates. The process is preferably initiated following field oxide formation, wordline formation, access transistor source/drain region formation, deposition of a planarizing dielectric layer, formation of bitline contact and storage-node contact openings in the planarizing layer, and formation of conductive plugs in both types of contact openings. The process is implemented by sequentially depositing a first tetraethylorthosilicate (TEOS) oxide layer, a first silicon nitride layer, a second TEOS oxide layer, a second silicon nitride layer, and a boro-phospho-silicate glass (BPSG) layer to form a multi-layer partly-sacrificial stack. Depressions are etched in the partly-sacrificial stack and amorphous silicon cup-shaped storage-node plates are formed in the depressions. Following removal of the BPSG layer and the second silicon nitride layer, HSG polysilicon asperities are formed on the plates. The second TEOS oxide layer is then removed, exposing the first silicon nitride layer. A silicon nitride cell dielectric layer is then deposited over the surface of the array.

REFERENCES:
patent: 5162248 (1992-11-01), Dennison et al.
patent: 5168073 (1992-12-01), Gonzalez et al.
patent: 5292677 (1994-03-01), Dennison
patent: 5338700 (1994-08-01), Dennison et al.
patent: 5354705 (1994-10-01), Mathews et al.
patent: 5447878 (1995-09-01), Park et al.

Affiliated with

Also associated with

Rating

Process for fabricating a cup-shaped DRAM capacitor using a mult does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for fabricating a cup-shaped DRAM capacitor using a mult, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for fabricating a cup-shaped DRAM capacitor using a mult will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-941191