Memory addressing system for sequentially accessing all memory a

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G06F 302

Patent

active

043800530

ABSTRACT:
An improved memory addressing system is incorporated in an electronic calculator having input keys for entering numerical data, operational instructions and memory control instructions, a memory for storing the numerical data, and a processor for executing the operational instructions and memory control instructions with numerical data transferred to or from the memory. The keys may be operated in a specific sequence that designates an area in the memory comprising a plurality of memory addresses. A detector detects actuation of the keys in the specific sequence and generates an output signal indicative thereof. A memory access control then sequentially accesses all of the addresses in the memory area in response to the output signal.

REFERENCES:
patent: 3911424 (1975-10-01), Giannuzzi et al.
patent: 3973113 (1976-08-01), Goldsamt
patent: 4156281 (1979-05-01), Hirano et al.

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