Graph architecture information processing system

Boots – shoes – and leggings

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Details

G06F 1516, G06F 1534

Patent

active

041775147

ABSTRACT:
An information processing system employing functionally distributed multiple processors has a unique manner of interconnecting and controlling the processors so that the deadlock problem is avoided even though the interconnection of the processors is based on a graph basis in the mathematical sense. The system employs a plurality of control processors of the same or different design to control by sequences of instructions the operation of data processors or other control processors. Each data processor performs a specific set of functions on varying data structures to accomplish such purposes as providing a memory in which a program resides or performs arithmetic or string computations. The design of the control and data processors are required to meet the definition of a control arc scheme for inter-processor communication. Uniquely designed control processors and/or data processors are required to allow interaction with external processors, such as keyboard, display and mass memory devices which are desired to be included in a given system but do not meet the control arc interface requirements. A functional system describing the utility and the manner of implementing the principles of the invention illustrates novel approaches for the direct execution of high level programming languages, string computation sequences and the generation of displayed images from a common source language for varying types of displays.

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patent: 3905023 (1975-09-01), Perpiglia
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patent: 4014005 (1977-03-01), Fox et al.

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