Semiconductor package with bi-substrate die

Details Semiconductor package with bi-substrate die Semiconductor package with bi-substrate die

1998-04-01

2000-02-01

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

257685, 257 787, 257686, 257777, H01L 2906, H01L 2302, H01L 2328

Patent

active

060206241

ABSTRACT:
A method for forming an interconnect for semiconductor devices is provided. The interconnect includes raised contact structures covered with a conductive layer and having penetrating projections for penetrating contacts for the semiconductor devices. In an illustrative embodiment, the interconnect can be used to form a bi-substrate die. An interconnect substrate for the bi-substrate die includes control and logic circuitry and a memory substrate for the bi-substrate die includes a memory array. The interconnect can also be used to establish an electrical connection to microscopic contacts formed on a conventional die. In addition, the interconnect can be formed with three dimensional micro structures for contacting the microscopic contacts. Still further, the interconnect can be formed as wafer interconnect for electrically contacting dice contained on a wafer or for stacking multiple wafers.

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patent: 5716218 (1998-02-01), Farnworth et al.
patent: 5719438 (1998-02-01), Beilstein, Jr. et al.

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