Patent
1989-07-21
1991-01-08
Mintel, William
357 65, 357 71, H01L 2348
Patent
active
049840606
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Technical Field:
The present invention relates to a semiconductor device for use in, for example, ultra-high density integrated circuits.
2. Background Art:
In recent years, the degree of integration of Si grows increasingly with large strides to cause earnest research development to make fine sizes of constituent elements ranging from 1 .mu.m to 0.5 .mu.m or less. Along with such developments of elements made in fine sizes and LSIs made ultra-high in integration, metal wires for use in signal transmission in those LSIs are also increasingly required to be made fine and with high density.
As to metal wire materials for those LSIs, alloys based upon Al such as Al-Si, Al-Cu-Si and the like are widely employed at present. Those materials, however, suffer from diverse problems when wires of those materials are made fine and of high density. FIG. 2 (a) and 2 (b) here illustrate the results of observations of surfaces of Al-Si, which are formed by DC magnetron sputtering widely used conventionally, with use of a Nomarsky differential interference microscope. Films with thickness of about 1 .mu.m are formed by heating a substrate to 250.degree. C. FIG. 2 (a) shows the surface of Al-Si just after the film formation by the DC magnetron sputtering, and FIG. 2 (b) shows the surface of the same after annealing for 30 minutes in forming gas at 400.degree. C. As evidenced by photographs in the figures, the heat treatment causes uneveness on the surfaces of the Al film. These unevennesses are called hillock, the sizes of which range from 0.5 to 1 .mu.m or more. Such hillocks greatly reduce the yield of LSIs for the reason which will be described with reference to FIG. 3.
FIG. 3 (a) is a schematic cross sectional view illustrating a two-layer wiring structure. Numerals 301, 302, and 303 designate insulating films of for example SiO.sub.2. Numerals 304 and 304' designate the first-layer Al-Si wiring, and 305 designates the second-layer one, both the wirings being insulated by an interlayer insulating film 302. In addition, the numeral 306 designates a hole made through the interlayer insulating film 302 for electrically connecting the first layer wiring 304' with the second one 305, which hole is called a through hole or via here, and the numeral 307 designates a hillock produced on the upper surface of the first layer wiring 304 where the thickness of the interlayer insulating film 302 is made thinner. This may cause reduced dielectric strength at this portion as compared with other portions where no hillock is produced.
Now, on the assumption that the thickness of the interlayer film 302 at the portions with no hillock is T, the hight of the hillock is H, and the strength of an electric field, by which the interlayer film 302 is rendered to dielectric breakdown, is E.sub.b, dielectric breakdown voltage V.sub.b ' between the wiring 304 and 305 is expressed by by as the height H of the hillock gets nearer to the thickness T of the interlayer insulating film.
FIG. 4 (a) shows experimental data illustrating the distribution of the breakdown voltages of the interlayer insulating film, and FIG. 4 (b) is a cross sectional view of the measured sample. After the first layer Al-Si film 403 is formed on a silicon substrate 401 via an about 1 .mu.m -thick thermal oxidation film 402, a plasma SiO.sub.2 film 404 is deposited by about 1.6 .mu.m over the whole surface thereof. Thereafter, the whole surface is spin-coated by about 1 .mu.m with a resist and cured by baking, and then subjected to anisotropic etching on condition of the resist and SiO.sub.2 (404) being etched at the same speed, for the purpose of making the surface flat. Thereupon, the thickness of the plasma SiO.sub.2 film 404 at the flattened portion is made 1.2 .mu.m. Thereafter, a second Al-Si film 405 is deposited and patterned into a 200 .mu.m square. Moreover, the first layer Al-Si film 403 is a solid film with no patterning. The dielectric breakdown voltage is measured by applying DC voltage to the upper and lower metal films 405, 403
REFERENCES:
patent: 4531144 (1985-07-01), Holmberg
patent: 4674176 (1987-06-01), Tuckerman
patent: 4734754 (1988-03-01), Nikawa
patent: 4792842 (1988-12-01), Honma et al.
patent: 4884120 (1989-11-01), Mochizuki et al.
patent: 4887146 (1989-12-01), Hinode
Barson et al., "Hillock Suppression in Aluminum Thin Films", IBM Technical Disclosure Bulletin, vol. 13, No. 5, Oct. 1970, p. 1122.
No Author, "Encasing Aluminum Lines in Tungsten to Prevent Al Electromigration in Al-W Interconnect Metallurgies", IBM Technical Disclosure Bulletin, vol. 30, No. 5, Oct. 1987, p. 395.
Ho, "General Aspects of Barrier Layers for Very-Large-Scale Integration Applications I: Concepts", Thin Solid Films, 96 (1982), 301-316.
Ohmi Tadahiro
Shibata Tadashi
Umeda Masaru
Mintel William
Ohmi Tadahiro
LandOfFree
Semiconductor device wirings with hillocks does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device wirings with hillocks, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device wirings with hillocks will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-939265