Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1998-05-26
2000-02-01
Griffin, Steven P.
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438694, 438697, 4271263, 427387, 427402, H01L 21302, H01L 21311, B05D 512, B05D 302, B05D 136
Patent
active
060202653
ABSTRACT:
A method of forming a planar intermetal dielectric layer over conductive metal structures is disclosed. The method comprises the steps of: forming a liner oxide layer over the conductive metal structures; forming a cured low dielectric material layer over the liner oxide layer; forming an uncured low dielectric material layer over the cured low dielectric material layer; forming an uncured siloxane layer over the uncured low dielectric material layer; performing a chemical mechanical polishing (CMP) on the uncured siloxane layer and the uncured low dielectric material layer, said CMP stopping at a surface of the cured low dielectric material layer thereby leaving a remaining portion of the uncured low dielectric material layer in a spacing of the conductive metal structures; curing the remaining portion of the uncured low dielectric material layer; and forming a cap oxide layer over the cured low dielectric material layer and the cured remaining portion.
REFERENCES:
patent: 5312512 (1994-05-01), Allman et al.
Griffin Steven P.
Medina Maribel
Worldwide Semiconductor Manufacturing Corporation
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