Semiconductor integrated circuit with an input buffer circuit fo

Details Semiconductor integrated circuit with an input buffer circuit fo Semiconductor integrated circuit with an input buffer circuit fo

Filed on

1989-09-25

Date issued

1991-01-08

Examiner

Miller, Stanley D.

Patent Class

Electrical transmission or interconnection systems

SubClass

Nonlinear reactor systems

SubSubClass

Parametrons

Other Related Categories

307449, 307468, 307594, 307451, 365206, 365226, H03K 19003, H03K 19094, H03K 1716, H03K 17284

Type

Patent

Status

active

Patent number

049838610

Description

ABSTRACT:
A semiconductor integrated circuit comprises a first input circuit for generating an internal chip enable signal in response to a chip enable signal externally applied; and a second input circuit for supplying to an internal circuit a signal corresponding to a data signal externally applied thereto, the second input circuit containing a gate circuit controlled by an internal chip enable signal. The gate circuit responds to the data signal at a first response speed, and responds to the internal chip enable signal at a second response speed when the semiconductor integrated circuit is changed from the active state to the stand-by state. The second response speed being slower than the first response speed, so as to prevent the semi-conductor integrated circuit from being set into the stand-by state by a false operation of the first input circuit.

REFERENCES:
patent: 3769523 (1973-10-01), Suzuki
patent: 3911289 (1975-10-01), Takemoto
patent: 4420823 (1983-12-01), Shimada
patent: 4626715 (1986-12-01), Ishii
patent: 4638184 (1987-01-01), Kimura
patent: 4785203 (1988-11-01), Nakamura

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