Row address memory map overlap

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Details

365189, G11C 1300

Patent

active

042951925

ABSTRACT:
There is described a map memory system with a time-multiplexed memory address bus wherein the mapping function is performed on the high order address bits in parallel with the output of the low order address bits on the time multiplex bus.

REFERENCES:
patent: 3854126 (1974-12-01), Gray et al.

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