Four-quadrant multiplier using a CMOS D/A converter

Details Four-quadrant multiplier using a CMOS D/A converter Four-quadrant multiplier using a CMOS D/A converter

1986-05-19

1988-06-21

Smith, Jerry

Boots, shoes, and leggings

364602, G06J 100

Patent

active

047529008

ABSTRACT:
A four-quadrant multiplier uses a CMOS digital-to-analog converter (DAC) and just one operational amplifier. The back gates of the CMOS switches in the DAC are biased in the "off" condition during a substantial voltage swing at the output of the DAC. In one embodiment, the back gates of the CMOS switches are held at about -5 V with respect to the output lines, and the logic low level to the off switch also is set at -5 V relative to the output lines. The DAC connections are "reversed" so as to receive the analog input across the terminals intended as the DAC's output, with the inputs of the operational amplifier being connected across the reference voltage terminal and a feedback or output terminal of the DAC.

REFERENCES:
patent: 4590456 (1986-05-01), Burton et al.

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